# HG changeset patch # User K. Arvanitis # Date 1420944648 28800 # Node ID 0ada7c23788e9dcac6160d3104e5f448e53af396 # Parent 0ccddc8155647a3fb78d2eda13b098e7c2b59f94 [FT-60] Add Memory Bank Support Implments a basic BankModel for Yaesu FT-60r in support of memory at address 0x69C8. Bug #1945 Bug #675 diff -r 0ccddc815564 -r 0ada7c23788e chirp/ft60.py --- a/chirp/ft60.py Thu Jan 01 19:02:09 2015 +0100 +++ b/chirp/ft60.py Sat Jan 10 18:50:48 2015 -0800 @@ -148,6 +148,11 @@ unknown2:7; } names[1000]; +#seekto 0x69C8; +struct { + bbcd memory[128]; +} banks[10]; + #seekto 0x6FC8; u8 checksum; """ @@ -161,6 +166,49 @@ SKIPS = ["", "S", "P"] CHARSET = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ [?]^__|`?$%&-()*+,-,/|;/=>?@" +class FT60BankModel(chirp_common.BankModel): + def get_num_mappings(self): + return 10 + + def get_mappings(self): + banks = [] + for i in range(0, self.get_num_mappings()): + bank = chirp_common.Bank(self, "%i" % (i + 1), "Bank %i" % (i + 1)) + bank.index = i + banks.append(bank) + return banks + + def add_memory_to_mapping(self, memory, bank): + number = (memory.number - 1) / 8 + mask = 1 << ((memory.number - 1) & 7) + self._radio._memobj.banks[bank.index].memory[number].set_bits(mask) + + def remove_memory_from_mapping(self, memory, bank): + number = (memory.number - 1) / 8 + mask = 1 << ((memory.number - 1) & 7) + if self._radio._memobj.banks[bank.index].memory[number].get_bits(mask) != mask: + raise Exception("Memory %i is not in bank %s." % \ + (memory.number, bank)) + self._radio._memobj.banks[bank.index].memory[number].clr_bits(mask) + + def get_mapping_memories(self, bank): + memories = [] + for i in range(*self._radio.get_features().memory_bounds): + number = (i - 1) / 8 + mask = 1 << ((i - 1) & 7) + if self._radio._memobj.banks[bank.index].memory[number].get_bits(mask) == mask: + memories.append(self._radio.get_memory(i)) + return memories + + def get_memory_mappings(self, memory): + banks = [] + for bank in self.get_mappings(): + number = (memory.number - 1) / 8 + mask = 1 << ((memory.number - 1) & 7) + if self._radio._memobj.banks[bank.index].memory[number].get_bits(mask) == mask: + banks.append(bank) + return banks + @directory.register class FT60Radio(yaesu_clone.YaesuCloneModeRadio): """Yaesu FT-60""" @@ -206,11 +254,14 @@ rf.valid_bands = [(108000000, 520000000), (700000000, 999990000)] rf.can_odd_split = True rf.has_ctone = False - rf.has_bank = False + rf.has_bank = True rf.has_dtcs_polarity = False return rf + def get_bank_model(self): + return FT60BankModel(self) + def _checksums(self): return [ yaesu_clone.YaesuChecksum(0x0000, 0x6FC7) ]