[chirp_devel] [PATCH] [FT-60] Add Memory Bank Support‏

[Kosta Arvanitis]

# HG changeset patch
# User K. Arvanitis <kosta at alumni.uvic.ca>
# Date 1418886071 28800
#      Wed Dec 17 23:01:11 2014 -0800
# Node ID 03036f7504855df0a6ef80b83488c2d364ec8f7d
# Parent  b81f4667efb09bca1cbcbe2e063986d63191b863
[FT-60] Add Memory Bank Support

Implments a basic BankModel for Yaesu FT-60r in support of memory at address 0x69C8.

Bug #1945
Bug #675

diff -r b81f4667efb0 -r 03036f750485 chirp/ft60.py
--- a/chirp/ft60.py Tue Dec 09 14:43:41 2014 -0800
+++ b/chirp/ft60.py Wed Dec 17 23:01:11 2014 -0800
@@ -148,6 +148,11 @@
      unknown2:7;
 } names[1000];
 
+#seekto 0x69C8;
+struct {
+  bbcd memory[128];
+} banks[10];
+
 #seekto 0x6FC8;
 u8 checksum;
 """
@@ -161,6 +166,46 @@
 SKIPS = ["", "S", "P"]
 CHARSET = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ [?]^__|`?$%&-()*+,-,/|;/=>?@"
 
+class FT60BankModel(chirp_common.BankModel):
+    def get_num_mappings(self):
+        return 10
+
+    def get_mappings(self):
+        banks = []
+        for i in range(0, self.get_num_mappings()):
+            bank = chirp_common.Bank(self, "%i" % (i + 1), "Bank %i" % (i + 1))
+            bank.index = i
+            banks.append(bank)
+        return banks
+
+    def add_memory_to_mapping(self, memory, bank):
+        number = (memory.number - 1) / 8
+        mask = 1 << ((memory.number - 1) & 7)
+        self._radio._memobj.banks[bank.index].memory[number].set_bits(mask)
+
+    def remove_memory_from_mapping(self, memory, bank):
+        number = (memory.number - 1) / 8
+        mask = 1 << ((memory.number - 1) & 7)
+        self._radio._memobj.banks[bank.index].memory[number].clr_bits(mask)
+
+    def get_mapping_memories(self, bank):
+        memories = []
+        for i in range(*self._radio.get_features().memory_bounds):
+            number = (i - 1) / 8
+            mask = 1 << ((i - 1) & 7)
+            if self._radio._memobj.banks[bank.index].memory[number].get_bits(mask) == mask:
+                memories.append(self._radio.get_memory(i))
+        return memories
+
+    def get_memory_mappings(self, memory):
+        banks = []
+        for bank in self.get_mappings():
+            number = (memory.number - 1) / 8
+            mask = 1 << ((memory.number - 1) & 7)
+            if self._radio._memobj.banks[bank.index].memory[number].get_bits(mask) == mask:
+                banks.append(bank)
+        return banks
+
 @directory.register
 class FT60Radio(yaesu_clone.YaesuCloneModeRadio):
     """Yaesu FT-60"""
@@ -206,11 +251,14 @@
         rf.valid_bands = [(108000000, 520000000), (700000000, 999990000)]
         rf.can_odd_split = True
         rf.has_ctone = False
-        rf.has_bank = False
+        rf.has_bank = True
         rf.has_dtcs_polarity = False
 
         return rf
 
+    def get_bank_model(self):
+        return FT60BankModel(self)
+
     def _checksums(self):
         return [ yaesu_clone.YaesuChecksum(0x0000, 0x6FC7) ]